单词bist
网络: 内建自测试(Built-In Self Test)；内建自我测试；内置自测
The proposed BIST scheme relies on a pseudo-random testing phase and a deterministic phase.
这一自测试策略包含伪随机测试阶段和确定性测试阶段。
Define test methodology (SCAN, BIST, JTAG etc. ) for the entire chip. Test pattern generation and optimization.
制定芯片整体测试方法（SCAN，BIST，JTAG等）。制定和优化测试模式。
Template is a cornerstone in the BIST for software, which affect the effectiveness and efficiency in software testing.
模板是软件内建自测试系统的基石，其内容关系到整个系统的性能和效果。
Recently, a BIST scheme using test patterns applied by Circuit-under-Test (TPAC) is proposed.
由被测电路自己施加测试向量的内建自测试方法是最近新提出的一种自测试技术。
Build-In Self-Test (BIST) is a commonly used DFT technologies.
内建自测试技术是一种普遍使用的可测性设计方法。
Gary Bist is a Staff Technical Writer at IBM"s Toronto Lab.
GaryBist是IBM多伦多实验室的专职技术作家。
l Design testing logic circuit, including: Memory BIST, scan insertion boundary scan test, delay test, macro test;
设计测试用逻辑电路，包括：库BIST，扫描插入边界扫描测试，延迟测试，宏测试；
The Research and Design BIST Based All Status Pseudo-Random Sequence Generators
基于全状态伪随机序列的BIST设计
Constraint Input Reduction BIST Scheme for Multiple Scan Chains
约束输入精简的多扫描链BIST方案
A high level register allocation algorithm for minimizing BIST test resources
一种减少BIST测试资源的高级寄存器分配算法